Research

Our current research activities are in beyond-​fifth-generation (B5G) multi-​antenna wireless communication systems,  positioning with wireless signals (including privacy aspects), simultaneous sensing and communication (SISCO), analog-​to-feature (A2F) conversion for low-​power sensing and signal classification, (non-​)convex optimization for digital signal processing systems, and hardware-​efficient machine learning in the realm of wireless systems. In all of these fields, we leverage a wide range of tools, including convex and non-​convex optimization, sparse signal recovery and compressive sensing, graphical models and message passing, Bayesian inference, nonparametric estimation, Monte-​Carlo methods, supervised and self-​supervised deep learning, dimensionality reduction, and manifold learning. On the hardware level, we levarage emerging architecture and VLSI-design concepts, including in- and near-memory processing, and semi-custom standard-cell design. Furthermore, insights gained from our hardware prototypes often inspire new theory and algorithms.

The IIP Group has developed a large number of ASICs in CMOS technologies ranging from UMC 250nm to TSMC 28nm, many of them in collaboration with the Microelectronics Design Center.

Furthermore, the IIP Group has expertise in the development of FPGA-​based hardware demonstrators and GPGPU implementations for applications in wireless systems and digital signal processing.

Read more about some of our individual research areas in the pages linked below: